Design of low power RRAM cell using CNFET

Abstract

This paper presents a CNFET based novel RRAM cell using memristor as memory element. The proposed RRAM cell is designed in such a way that half-select issue is resolved. Simulation results of critical design metrics of the proposed RRAM cell and previous 2T2M RRAM cell are compared. The proposed RRAM cell achieves 6.13x lower read delay along with 33x lower hold power due to use of MTCMOS power reduction technique than 2T2M cell at nominal VDD. It is a half-select free non-volatile RRAM cell with faster read operation and it is also power efficient.