Consumption of a SDRAM memory cell module by using Vamspicedesigner, a design tool based on VHDL-AMS and SPICE

Abstract

This paper presents an application concerning the SDRAM memory using Vamspicedesigner 1. Vamspicedesigner, is a tool created by the ET ENST Paris for aiding the design of multi-technological systems. For that, it uses free tools a schematic Electric/sup TM/, a compiler VHDL-AMS SPICE named Vamspice and SPICE OPUS as a simulator. A block box and or a component drawn by the schematic is associated to VHDL-AMS model or SPICE netlist. The hierarchical property of the schematic allows us to construct a macro-component box and makes it possible to navigate between various system levels (top-down and bottom-up).