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Grater: An approximation workflow for exploiting data-level parallelism in FPGA acceleration

2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) Pub Date : 2016-03-14 DOI:10.1007/978-3-319-53768-9_10
A. Lotfi, Abbas Rahimi, A. Yazdanbakhsh, H. Esmaeilzadeh, Rajesh K. Gupta
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引用次数: 26
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Grater:在FPGA加速中利用数据级并行性的近似工作流
本文章由计算机程序翻译，如有差异，请以英文原文为准。
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2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)
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