Timing-Aware Decoupling Capacitance Allocation in Power Distribution Networks

Sanjay Pant, D. Blaauw
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引用次数: 9

Abstract

Power supply noise increases the circuit delay, which may lead to performance failure of a design. Decoupling capacitance (decap) addition is effective in reducing the power supply noise, thus making the supply network more robust in presence of large switching currents. Traditionally, decaps have been allocated in order to minimize the worst-case voltage drop occurring in the power grid. In this paper, we propose an approach for timing-aware decap allocation which uses global time slacks to drive the decap optimization. Non-critical gates with larger timing slacks can tolerate a relatively higher supply voltage drop as compared to the gates on the critical paths. The decap allocation is formulated as a non-linear optimization problem using Lagrangian relaxation, and modified adjoint method is used to efficiently obtain the sensitivities of objective function to decap sizes. A fast path-based heuristic is also implemented and compared with the global optimization formulation. The two approaches have been implemented and tested on ISCAS85 benchmark circuits and with grids of different sizes. Compared to uniformly allocated decaps, the proposed approach utilizes 35.5% less total decap to meet the same delay target. For the same total decap budget, the proposed approach is shown to improve the circuit delay by 10.1% on an average.
配电网中时序感知的解耦电容分配
电源噪声增加了电路的延迟,可能导致设计的性能失效。去耦电容(decap)的增加有效地降低了电源噪声,从而使供电网络在存在大开关电流时更加稳健。传统上,为了最小化电网中发生的最坏情况电压降,已经分配了deccap。在本文中,我们提出了一种时间感知的decap分配方法,该方法利用全局时间松弛来驱动decap优化。与关键路径上的栅极相比,具有较大时序松弛的非关键栅极可以承受相对较高的电源电压降。采用拉格朗日松弛法将封盖分配化为非线性优化问题,并采用修正伴随法有效地获得目标函数对封盖尺寸的灵敏度。实现了一种快速的基于路径的启发式算法,并与全局优化公式进行了比较。这两种方法已经在ISCAS85基准电路和不同尺寸的网格上实现和测试。与均匀分配头包相比,该方法在满足相同延迟目标的情况下,减少了35.5%的总头包。对于相同的总封装预算,所提出的方法平均可将电路延迟提高10.1%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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