250nA quiescent current high PSRR voltage reference in standard CMOS process

Abstract

Power efficiency is very important in portable devices as well as noise immunity of analog ICs. This article describes a voltage reference circuit that operates with extremely low quiescent current (below 250 nA) and is compatible with a standard CMOS process. It is optimally designed for a wide range of applications such as portable electronic devices, automotive, medical equipment, including system-on-chip (SoC) implementation where high-power supply rejection ratio (PSRR) and switching noise immunity are very important. The described voltage reference provides up to 90 dB at low frequencies. Standard deviation of the output voltage variation is 0.5% with a temperature coefficient of 15 ppm/°C at -40°C to 125°C temperature range. These characteristics are achievable at 1.6V to 5.5V supply voltage range. Various design approaches for input noise immunity of voltage reference are implemented.