A pattern matching processor array with defect tolerance

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1986.1156985

T. Kawada, Y. Takahashi, N. Tsuda, M. Waki, N. Hagiwara

引用次数: 4

Abstract

A 16b processor chip with sorter and 32Kb dictionary RAM has been developed for hand-printed Kanji character recognition. This paper will describe the design techniques used to achieve defect tolerance in the memory and logic blocks. A 18.5×20.5mm2chip contains 460,000 transistors using a 3μm double metal CMOS technology.

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一种具有缺陷容忍度的模式匹配处理器阵列

开发了一种16b处理器芯片，该芯片具有分选器和32Kb字典内存，可用于手印汉字识别。本文将描述用于实现内存和逻辑块缺陷容忍度的设计技术。18.5×20.5mm2chip采用3μm双金属CMOS技术，包含46万个晶体管。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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