K. Chabak, Xin Miao, Chen Zhang, D. Walker, Xiuling Li
{"title":"RF performance of 3D III-V nanowire T-Gate HEMTs grown by VLS method","authors":"K. Chabak, Xin Miao, Chen Zhang, D. Walker, Xiuling Li","doi":"10.1109/DRC.2014.6872372","DOIUrl":null,"url":null,"abstract":"Continued down-scaling of digital and RF electronics has spawn new research efforts in various nanotechnologies such as 2D semiconducting sheets and nanowires as the conducting transistor channel. Nanoscale field-effect transistors (FETs) promise to bring power-efficient operation, improved short channel effects, and added functionalities beyond conventional top-down planar devices such as facile heterogeneous integration. So far, impressive results with fT > 400 GHz have been achieved with graphene FETs [1]. However, the highest achieved fmax for carbon-based devices is below 70 GHz [2] which is related to poor output conductance (gds) and weak channel modulation either from metallic carbon nanotubes or a metallic-like gapless graphene channel. While a high fT is important, FETs generally benefit from fmax > fT for amplification of RF signals [3]. III-V nanowires (NWs), on the other hand, retain well-known transport characteristics with inherent 3D profile for improved electrostatics. The most commonly used growth method for NWs is via the metal-assisted vapor-liquid-solid (VLS) mechanism. Several III-V NW FETs have been reported with excellent dc performance, but preference for NW growth to proceed normal to the substrate has stunted RF devices where arrays of NW channels are required to deliver sufficiently high raw current. Vertical InAs NW FETs have been reported with impressive 100+ GHz performance, but remain limited by challenging device fabrication and parasitic overlapping pad capacitance [4,5]. Both of these limitations can be avoided by growing high-density NW arrays along the surface of the substrate. Here, we present the first demonstration of VLS grown III-V NW channels self-assembled in parallel arrays with fT/fmax > 30/70+ GHz using a GaAs channel. These results are state-of-the-art for III-V NWs assembled in planar arrays.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"72nd Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2014.6872372","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Continued down-scaling of digital and RF electronics has spawn new research efforts in various nanotechnologies such as 2D semiconducting sheets and nanowires as the conducting transistor channel. Nanoscale field-effect transistors (FETs) promise to bring power-efficient operation, improved short channel effects, and added functionalities beyond conventional top-down planar devices such as facile heterogeneous integration. So far, impressive results with fT > 400 GHz have been achieved with graphene FETs [1]. However, the highest achieved fmax for carbon-based devices is below 70 GHz [2] which is related to poor output conductance (gds) and weak channel modulation either from metallic carbon nanotubes or a metallic-like gapless graphene channel. While a high fT is important, FETs generally benefit from fmax > fT for amplification of RF signals [3]. III-V nanowires (NWs), on the other hand, retain well-known transport characteristics with inherent 3D profile for improved electrostatics. The most commonly used growth method for NWs is via the metal-assisted vapor-liquid-solid (VLS) mechanism. Several III-V NW FETs have been reported with excellent dc performance, but preference for NW growth to proceed normal to the substrate has stunted RF devices where arrays of NW channels are required to deliver sufficiently high raw current. Vertical InAs NW FETs have been reported with impressive 100+ GHz performance, but remain limited by challenging device fabrication and parasitic overlapping pad capacitance [4,5]. Both of these limitations can be avoided by growing high-density NW arrays along the surface of the substrate. Here, we present the first demonstration of VLS grown III-V NW channels self-assembled in parallel arrays with fT/fmax > 30/70+ GHz using a GaAs channel. These results are state-of-the-art for III-V NWs assembled in planar arrays.