Two-stage Hot Carrier Degradation of LDMOS Transistors.

Abstract

This paper analyses the hot carrier behaviour of a lateral n-type DMOS transistor. Variable base charge pumping experiments are performed to locate the different degradation spots in the transistor, as well as to monitor the increase in interface trap density. Upon hot carrier stress, interface traps are formed at three different locations in the device : in the channel, at the source side birds beak, and under the field oxide at the n-well edge. For the degradation of the specific on-resistance Ron, a two-stage degradation is observed, explained and modelled.