Thermal simulation of heterogeneous GaN/ InP/silicon 3DIC stacks

T. R. Harris, Eric J. Wyers, Lee Wang, S. Graham, G. Pavlidis, P. Franzon, W. R. Davis
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引用次数: 8

Abstract

Integration of materials such as GaN, InP, SiGe, and Si is a natural extension of the 3D-IC perspective and provides a unique solution for high performance circuits. In this approach, application of a component is no longer dependent on semiconductor material selection. In this paper, preliminary results are presented which examine the thermal performance of the technology. A thermal analysis prototype solution in Mentor Graphics™ Calibre® provides surface heat maps based on IC layout, material property, and geometric configuration files. Chiplets are connected by heterogeneous interconnect (HIC). Differences in thermal performance of GaN and InP chiplets are explored by varying the number of HICs. Two methods for building up the model of a test chip are compared. One method uses custom scripts to place discrete blocks in the model to represent HICs, while the other uses thermal material properties extracted from the layout. Measurements presented confirm simulated results.
非均质GaN/ InP/硅3DIC堆叠的热模拟
GaN、InP、SiGe和Si等材料的集成是3D-IC视角的自然延伸,为高性能电路提供了独特的解决方案。在这种方法中,组件的应用不再依赖于半导体材料的选择。本文给出了该技术热性能的初步测试结果。Mentor Graphics™Calibre®中的热分析原型解决方案提供基于IC布局,材料属性和几何配置文件的表面热图。芯片通过异构互连(HIC)连接。通过改变hic的数量,探讨了GaN和InP芯片的热性能差异。比较了两种建立测试芯片模型的方法。一种方法使用自定义脚本在模型中放置离散块来表示HICs,而另一种方法使用从布局中提取的热材料属性。给出的测量结果证实了模拟结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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