Fully depleted devices for designers: FDSOI and FinFETs

Abstract

Technologies featuring fully depleted transistors are entering the mainstream for designs at the 28nm, 20nm, and 14nm nodes. Although these devices have been the playground of device engineers for more than a decade it is for the most part only recently that they have been introduced to circuit designers and logic chip integrators. The physical structure and many of the features - or lack thereof - of the transistors vis-à-vis conventional planar devices are different, opening some new doors and perhaps closing some old ones. In this paper we discuss both planar (variously called ETSOI/UTBB/FDSOI1) and three-dimensional (variously called FinFET or trigate or doublegate) fully depleted devices, comparing and contrasting them with one another and with classical devices, and in both bulk and SOI manifestations.