Maximizing the voltage and current capability of GaN FETs in a hard-switching converter

Abstract

This paper establishes a methodology for maximizing the voltage and current capability of a GaN FET, while maintaining an acceptably low overshoot voltage and junction temperature to prevent damage to the device. Two key contributions of this work are the gate driver design parameters and operating conditions that impact overshoot voltage, and a heatsink design for bottom-side cooling that avoids thermal vias. Additionally, the static and dynamic characterization steps required for this methodology are described, and an example GaN-based full-bridge inverter was designed and tested for experimental verification, using GaN gate injection transistors with capacitive gate driver circuits.