SiCBit-PUF: Strong in-Cache Bitflip PUF Computation for Trusted SoCs

Abstract

Secure computing necessitates hardware root of trust (RoT) integrated in Systems-on-Chips (SoCs) for cryptographic keys generation, authentication and identification. In this paper, we observe that bitflips in SRAM cells that appear while accessing multiple cells from the same bitline, are not stochastic, as previously considered, but systematic. Based on this observation, a novel strong in-memory Physical Unclonable Function (PUF) computation is proposed for harvesting static entropy from SRAM arrays. The proposed design is compatible with existing in-SRAM computing architectures. To verify our PUF operation, we implement a 6T SRAM array model that performs in-memory computing using a 32 nm CMOS Technology, and, through SPICE simulation, we evaluate the proposed PUF performance. The proposed PUF operation achieves uniqueness and uniformity of 49.99%, and 49.74%, respectively, and reliability higher than 97.4% when the temperature is varied from 0°C to 100°C, and higher than 95.2% when the nominal voltage supply is varied by 10%. Furthermore, we explore the scaling of the number of Challenge Response Pairs (CRPs) of the proposed PUF, and we compare it against the state-of-the-art. Our PUF offers orders of magnitude higher number of CRPs, therefore it is suitable for integrated mechanisms that assure secure computing in SoCs.