A 14-/spl mu/A 3-ppm//spl deg/C CMOS bandgap voltage reference

Chunhua Yao, Boan Liu, Yuwen Xia
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引用次数: 4

Abstract

The work presented in this paper improves on a high order curvature-compensated CMOS band-gap reference circuit design. A cascoded current mirror is utilized in order to increase the bandgap voltage's power supply rejection ratio (PSRR) and decrease the mismatch current. A source follower is inserted in series with the capacitor to guarantee the system stable. Simulated in the standard 0.18mum CMOS technology, the proposed voltage reference can operate down to 1.5V supply and consumes supply current of 14muA. A temperature coefficient of 3-ppm/degC is achieved through the temperature-dependent resistor ratio
一个14-/spl μ /A 3-ppm//spl度/C CMOS带隙基准电压
本文对高阶曲率补偿CMOS带隙参考电路的设计进行了改进。为了提高带隙电压的电源抑制比(PSRR)和减小失配电流,采用了级联电流镜。源从动器与电容串联,保证系统稳定。在标准的0.18mum CMOS技术中进行仿真,所提出的基准电压可以低至1.5V电源,消耗14muA电源电流。温度系数3 ppm/摄氏度是通过温度相关电阻比实现的
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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