Advanced circuit techniques for high-performance microprocessor and low-power DSPs

Proceedings of the 2004 IEEE Dallas/CAS Workshop Implementation of High Performance Circuits Pub Date : 2004-11-30 DOI:10.1109/DCAS.2004.1360432

S. Mathew, R. Krishnamurthy, M. Anders, S. Hsu, S. Borkar

引用次数: 2

Abstract

This article presents the challenges and solutions for a high-performance microprocessors and low-power digital signal processing chips. It discusses the high-performance power-efficient execution core such as the 6.5 GHz single-rail domino 32-bit Han-Car ALU; the 4 GHz semi-dynamic 32-bit sparse-tree AGU. It also deals with leakage-tolerant register files; conditional/burn-in keeper; pseudo-static bitlines; low-power datapaths for DSP applications; and the 1 GHz 16-bit static multiplier.

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高性能微处理器和低功耗dsp的先进电路技术

本文介绍了高性能微处理器和低功耗数字信号处理芯片所面临的挑战和解决方案。讨论了6.5 GHz单轨domino 32位Han-Car ALU等高性能节能执行核;4 GHz半动态32位稀疏树AGU。它还处理防泄漏寄存器文件;条件/老化门将;伪静态的bitlines;用于DSP应用的低功耗数据路径;以及1 GHz 16位静态乘法器。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Proceedings of the 2004 IEEE Dallas/CAS Workshop Implementation of High Performance Circuits

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