Damascene planar metal-insulator-metal tunnel junctions

Abstract

In this paper, we show a process for the fabrication of planar sub-attofarad capacitance metal-insulator-metal tunnel junctions with nanometer size. We show the engineering of the material stack, anti-diffusion barrier and electrode metal as well as the result of improved characteristics and stability in time of the devices. This engineering is supported by a simulation tool we developed and its goal is to optimize the original process for the development of high-temperature operating SETs and other innovative nanoelectronic devices.