SoC, NoC and Hierarchical Bus Implementations of Applications on FPGAs Using the FCUDA Flow

Abstract

The FCUDA project aims to improve programmability of FPGAs and expression of application parallelism in High Level Synthesis (HLS) through the use of the CUDA language. The CUDA language is a popular single-instruction multiple data (SIMD) style programming language with wide adoption, thus offering significant opportunity to bring experienced programmers to FPGA computing. The FCUDA project now has open-sourced the core CUDA to RTL transformation as well as the infrastructure for design space exploration, bus-based andNoC-based on-chip communications, and platform integration with Xilinx's SoC systems. In this paper, we present FCUDA's design space exploration, interconnect and platform integration to present guidelines for selecting system-level infrastructure for an application for the best implementation.