A logic sharing synthesis tool for mutually exclusive applications

Alp Kiliç, Z. Marrakchi, M. Tuna, H. Mehrez
{"title":"A logic sharing synthesis tool for mutually exclusive applications","authors":"Alp Kiliç, Z. Marrakchi, M. Tuna, H. Mehrez","doi":"10.1109/DTIS.2012.6232984","DOIUrl":null,"url":null,"abstract":"Multiple Context ASIC (mASIC) is a circuit grouping a set of designs (applications) which operates at mutually exclusive times. In this paper we propose to take this particularity into account when we run logic synthesis. The idea is to maximize logic resources sharing between designs to reduce the total resulting area. Once used on mASIC for a set of 5 benchmark designs, our synthesizing technique reduces area by 28% compared to the sum of the 5 individual ASIC areas.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2012.6232984","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

Multiple Context ASIC (mASIC) is a circuit grouping a set of designs (applications) which operates at mutually exclusive times. In this paper we propose to take this particularity into account when we run logic synthesis. The idea is to maximize logic resources sharing between designs to reduce the total resulting area. Once used on mASIC for a set of 5 benchmark designs, our synthesizing technique reduces area by 28% compared to the sum of the 5 individual ASIC areas.
用于互斥应用程序的逻辑共享综合工具
多上下文专用集成电路(mASIC)是一种电路,将一组设计(应用)分组,这些设计(应用)在相互排斥的时间运行。在本文中,我们建议在进行逻辑综合时考虑到这种特殊性。这个想法是最大化设计之间的逻辑资源共享,以减少总结果面积。一旦在一组5个基准设计的ASIC上使用,我们的合成技术与5个单独ASIC面积的总和相比,面积减少了28%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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