Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System

Abstract

This paper describes the advantages of integrating a common Power Clamp with the ability to withstand voltage and save on wafer area. The system chip does not require a power clamp for each input source. It is as long as the system core circuit by electrostatic protection. It can reach normal operation and save as much chip area as possible. The structure of this paper has three main features: (1) electrostatic protection (ESD) circuit common Power Clamp combination (2) T025 process high and low voltage ESD (3) The experiment and results within ESD system. The results of ESD sensitivity passed is -6250V~+6200V for type HBM mode. It is -375V~+375V for type MM mode.