An algebra for switch-level simulation

Abstract

A methodology is presented for computing the steady-state solution of switch-level networks. The method is based on a matrix algebra similar in many respects to circuit nodal analysis. The formulation steps are similar to the nodal equation formulation steps and the network matrix has the same dimension and structure as the nodal admittance matrix, except that logic operations (min and max operations) are used in formulating and solving the network equations. Solution algorithms are then developed using the new algebra. The approach has been implemented as a part of a mixed-mode simulator which uses partitioning and sparse matrix solution techniques in analyzing a circuit. In its switch-level mode, the simulator can perform logic and concurrent fault simulation using realistic fault models, including bridging faults, and has been found to be competitive with existing switch-level simulators.<>