{"title":"Manufacturing for design: putting process control in the language of the designer","authors":"D. Potts","doi":"10.1109/ASMC.1998.731551","DOIUrl":null,"url":null,"abstract":"A methodology is presented for evaluation of process control from the designer's perspective, that of overall electrical performance. Technology tables and a comprehensive set of strategically chosen wafer electrical tests are used to capture and maintain the electrical signature of a process.","PeriodicalId":290016,"journal":{"name":"IEEE/SEMI 1998 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop (Cat. No.98CH36168)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE/SEMI 1998 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop (Cat. No.98CH36168)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASMC.1998.731551","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A methodology is presented for evaluation of process control from the designer's perspective, that of overall electrical performance. Technology tables and a comprehensive set of strategically chosen wafer electrical tests are used to capture and maintain the electrical signature of a process.