A Delta Sigma based Finite Impulse Response Filter for EEG Signal Processing

Abstract

This paper presents the design of a Finite Impulse Response Filter based on Delta Sigma Signal Processing. Both input and output of the proposed circuit are encoded as second-order Delta Sigma bit-streams. The design is realized using a Delta Sigma adder based on an input counter. The Delta Sigma adder can also be used as a coefficient multiplier. Using the proposed Delta Sigma adder and coefficient multiplier, an Finite Impulse Response filter is designed for Electroencephalogram signal processing. Simulation and synthesis results are shown based on IBM 180nm CMOS technology. The proposed design achieves a Θ(N) complexity with N inputs and can work with higher-order Delta Sigma bit-streams.