Low power data format converter design using semi-static register allocation

K. Srivatsan, C. Chakrabarti, L. Lucke
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引用次数: 6

Abstract

In many applications, such as digital signal processing, data format converters are used to reformat the data transferred between processing modules. In VLSI implementations, these converters consume a large portion of the available resources. Various methods have been proposed to synthesize data format converter architectures while optimizing the number of registers used to store the data. In this paper, we present a new register allocation scheme which not only minimizes the number of resistors, but also minimizes the power consumption in the data format converter. Low power data format converters are synthesized by minimizing the transitions and interconnections between the registers used to store the data. We present both a heuristic and an integer linear programming formulation to solve the allocation problem. Our method shows significant improvement over previous techniques.
采用半静态寄存器分配的低功耗数据格式转换器设计
在许多应用中,例如数字信号处理,数据格式转换器被用来重新格式化处理模块之间传输的数据。在VLSI实现中,这些转换器消耗了很大一部分可用资源。在优化用于存储数据的寄存器数量的同时,已经提出了各种方法来综合数据格式转换器体系结构。在本文中,我们提出了一种新的寄存器分配方案,该方案既可以减少电阻的数量,又可以降低数据格式转换器的功耗。低功耗数据格式转换器是通过最小化用于存储数据的寄存器之间的转换和互连来合成的。我们提出了一个启发式和一个整数线性规划公式来解决分配问题。我们的方法比以前的技术有了显著的改进。
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