Implementing multi-gigahertz test systems using CMOS FPGAs and PECL components

Abstract

Two research projects are described that develop low-cost techniques for testing multi-gigahertz devices. Each project uses commercially available components to keep costs low, and achieves performance characteristics comparable to (and in some ways exceeding) more expensive ATE. An FPGA-based logic core provides flexibility, adaptability, and communication with controlling computers while customized emitter-coupled logic achieves multi-gigahertz data rates with about /spl plusmn/25ps timing accuracy. This paper has been adapted from (Keezer, 2005).