{"title":"A Portable Clock Recovery Circuit (CRC) For Systems-On-Chip Serial Data Communication","authors":"M. Elrabaa","doi":"10.1109/ICM.2006.373301","DOIUrl":null,"url":null,"abstract":"An all-digital clock recovery circuit that is capable of extracting the clock embedded in the serial data stream is presented. The new CRC can retime the output clock with the received data within two bit transitions. The absence of analog filters or other analog blocks gives it a much smaller area than conventional circuitry. Also, being fully-digital, it can be described, simulated and synthesized using hardware description languages and be ported to any technology (thus supporting system on a chip designs). Circuit operation and performance was demonstrated using a 0.13 mum, 1.2 V CMOS technology and T-Spicereg simulations.","PeriodicalId":284717,"journal":{"name":"2006 International Conference on Microelectronics","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Conference on Microelectronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2006.373301","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
An all-digital clock recovery circuit that is capable of extracting the clock embedded in the serial data stream is presented. The new CRC can retime the output clock with the received data within two bit transitions. The absence of analog filters or other analog blocks gives it a much smaller area than conventional circuitry. Also, being fully-digital, it can be described, simulated and synthesized using hardware description languages and be ported to any technology (thus supporting system on a chip designs). Circuit operation and performance was demonstrated using a 0.13 mum, 1.2 V CMOS technology and T-Spicereg simulations.
提出了一种能够提取串行数据流中嵌入的时钟的全数字时钟恢复电路。新的CRC可以用接收到的数据在2位转换内重新定时输出时钟。由于没有模拟滤波器或其他模拟块,它的面积比传统电路小得多。此外,由于是全数字化的,它可以用硬件描述语言来描述、模拟和合成,并可以移植到任何技术上(从而支持芯片上的系统设计)。采用0.13 μ m, 1.2 V CMOS技术和T-Spicereg模拟验证了电路的工作和性能。