Defending Against Misspeculation-based Cache Probe Attacks Using Variable Record Table

Love Kumar Sah, S. A. Islam, S. Katkoori
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Abstract

Meltdown and Spectre attacks exploit speculative execution in a processor to leak sensitive data that would otherwise be inaccessible. Existing countermeasures based on temporary patches come at the cost of significant performance overhead. In this work, we present a novel approach to detect misspeculation based cache probe attacks. For a given function call, our approach keeps track of the misspeculative cache accesses and flags any accesses outside of the function. A variable record table (VRT) which is inaccessible to the programmer, is employed for such purpose. We validate our approach with SimpleScalar/PISA toolset for six (6) benchmarks chosen from MiBench benchmark suite. Experimental results demonstrate that our approach detects illegal misspeculative accesses with zero additional instruction overhead. The VRT with 512 entries (25Kb) incurs an area and power overhead of 7.98% and 10.22%, respectively with no penalty in time due to parallel search mechanism.
基于可变记录表的缓存探测错误防范
Meltdown和Spectre攻击利用处理器中的推测执行来泄露原本无法访问的敏感数据。现有的基于临时补丁的对策以显著的性能开销为代价。在这项工作中,我们提出了一种新的方法来检测基于错误猜测的缓存探测攻击。对于给定的函数调用,我们的方法跟踪错误的缓存访问,并标记函数外部的任何访问。为此,使用了程序员无法访问的变量记录表(VRT)。我们用SimpleScalar/PISA工具集验证了我们的方法,从MiBench基准测试套件中选择了六(6)个基准测试。实验结果表明,我们的方法可以在零额外指令开销的情况下检测非法的错误推测访问。512条VRT (25Kb)的面积开销和功耗开销分别为7.98%和10.22%,由于并行搜索机制,在时间上没有损失。
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