A Low Power Real-Time DC Removal Circuit for PPG Readout

Abstract

A low-power real-time DC removal circuit for PPG readout is proposed. A moving average filter is used to extract real-time DC voltage. Four sampling capacitors are used, three of which are used for storing the sampled input voltages, and the remaining one is used to store the average value. As the circuit continues to cycle, the weight of the older average voltage is getting lower and lower, to achieve the moving average. The removal operation is implemented by a switched capacitor subtractor with a low-power class AB amplifier. The proposed circuit is embedded between the transimpedance amplifier and the quantizer. A multi-phase clock generator is used to generate switch control signals. Implemented in 0.18μm CMOS technology, simulation results show that this DC removal circuit can remove real-time DC offset and suppress slow DC drift. The simulated SNDR improvement of the proposed circuit is 40.5dB. The power consumption of the proposed circuit is 6 μW under the supply voltage of 1.2V.