Reduction of conducted electromagnetic interference in SMPS using programmable gate driving strength

Abstract

A gate driver IC with programmable driving strength to reduce conducted electromagnetic interference (CEMI) in SMPS is presented in this paper. The solution presented is to dynamically adjust the gate driving strength (output resistance Rout) at the arrival of each gate pulse to minimize CEMI while maintaining low switching loss. Dynamically adjusting Rout is not possible with conventional gate driver designs. A segmented gate driver is designed and fabricated in the AMS 0.35μm 40V HVCMOS process. Unlike snubber circuits, the proposed method does not require extra discrete components or wasted energy. Experimental results indicate up to a 7dBμV improvement in peak CEMI between 20 MHz and 30 MHz.