Assertion Coverage Aware Trace Signal Selection in Post-Silicon Validation

Abstract

Limited observability and controllability are the major challenges in post-silicon validation and debugging. Therefore trace buffer based run-time techniques have been proposed and applied to post-silicon validation for bug detection and localization. Assertions are widely used in pre-silicon verification to monitor if certain functional scenarios are working properly. In post-silicon validation, assertion checkers can be synthesized into the original design for enhanced visibility and debugging. However, hardware assertion checkers introduce additional area overhead. In this paper, we propose a method for trace signal selection for maximizing assertion coverage using SAT-based signal restoration algorithm without introducing any additional hardware. Experimental results show that the proposed methods can significantly improve the assertion coverage (up to 187.5%) compared to the use of forward propagation and backward justification (FB) based signal restoration algorithm for trace signal selection.