A Low-Power High Linear RF Mixer for 2.4GHz Low-Rate WPAN Applications

S. Gladson, K. Alekhya, M. Bhaskar
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引用次数: 1

Abstract

The IEEE 802.15.4 Low-Rate Wireless Personal Area Network (LR-WPAN) standard dictates stringent requirements on performance and cost. The standard is designed to cover a small area of coverage (10m), within the personal accessible space of the user. The LR-WPAN systems must be smaller in size to fit in the accessible area and also must be able to communicate with other wireless systems nearby, thus creating a wireless personal area network for the user. This personal communication network is the base for the Internet-of-Things (IoT) applications. These wireless systems must be of low cost and also provide the highest quality of performance to the user. A low cost chip poses the challenge of reduction in the area of the Silicon chip without affecting the performance of the system. This challenge is addressed in this paper by introducing a low cost, low-power, high-performance mixer for the LR-WPAN application. The proposed mixer circuit employs bulk biasing and active degeneration for linearity improvement. The analysis of the circuit for the gain and linearity is given for the understanding of the circuit operation. The mixer is designed and implemented in 180nm UMC CMOS technology using Cadence SpectreRF tool with probe pads for bare die measurement. The mixer offers a conversion gain of 15. 08dB with the output referred third-order intercept point (OIP3) at 21. 28dBm and a single-sideband (SSB) noise figure (NF) of 14.01dB. The performance is achieved by consuming only 3. 52mW of power from a 1. 8V supply. The Figure-of-Merit is calculated for performance comparison, and it is found to be better than some of the other mixer circuits reported in the literature. The proposed mixer circuit occupies a core area of 23.98 μm × 49.95 μm without the power rails and the probe pads.
一种用于2.4GHz低速率WPAN应用的低功耗高线性射频混频器
IEEE 802.15.4低速率无线个人区域网络(LR-WPAN)标准对性能和成本提出了严格的要求。该标准旨在覆盖用户个人可达空间内的小覆盖区域(10米)。LR-WPAN系统必须体积更小,以适应可访问的区域,还必须能够与附近的其他无线系统通信,从而为用户创建无线个人区域网络。这种个人通信网络是物联网应用的基础。这些无线系统必须是低成本的,并为用户提供最高质量的性能。低成本芯片提出了在不影响系统性能的情况下减少硅片面积的挑战。本文通过介绍一种低成本、低功耗、高性能的LR-WPAN混频器来解决这一挑战。本文提出的混频器电路采用整体偏置和有源退化来提高线性度。对电路的增益和线性度进行了分析,以便理解电路的工作原理。该混频器采用180nm UMC CMOS技术设计和实现,使用Cadence SpectreRF工具和用于裸模测量的探头垫。混合器提供15的转换增益。输出参考三阶截距点(OIP3)为21。28dBm,单边带(SSB)噪声系数(NF)为14.01dB。性能仅通过消耗3来实现。52兆瓦的功率来自1。8 v供应。计算了性能比较的优劣系数,发现它比文献中报道的其他一些混频器电路要好。该混频器电路的核心面积为23.98 μm × 49.95 μm,不含电源轨和探头垫。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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