Direction-Based Fast Mode Decision and Hardware Design for the AV1 Intra Prediction

Abstract

This work presents a fast decision algorithm and its hardware design for the AV1 intra prediction, inspired on the direction detection algorithm used on the CDEF (Constrained Directional Enhancement Filter) of the same codec. The main objective is to reduce the number of intra candidates with a low-cost heuristic, thus allowing a faster prediction time in software and also allowing a low-area and low-power intra prediction hardware design. The proposed algorithm was implemented in the AV1 reference encoder (libaom) and, experiments showed, on average, a 22.56% encoding time reduction, at a cost of 1.26% BD-BR increase. The hardware design synthesis, targeting the TSMC 40 nm and frequency of 951 MHz, resulted in an area and power of 39K NAND2 gates and 4.92 mW, respectively. This target frequency is enough for the processing of UHD 4K (3,840x2,160 pixels) videos at 30 frames per second. When considering the integration of this hardware with a directional AV1 intra prediction hardware, a dynamic power dissipation reduction of up to 93% is expected.