A new VLSI-oriented FFT algorithm and implementation

Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372) Pub Date : 1998-09-13 DOI:10.1109/ASIC.1998.723029

Lihong Jia, Yonghong Gao, J. Isoaho, H. Tenhunen

引用次数: 132

Abstract

In this paper, we present a new VLSI-oriented fast Fourier transform (FFT) algorithm-radix-2/4/8, which can effectively minimize the number of complex multiplications. This algorithm can be implemented efficiently using a pipelined architecture. Based on this pipelined architecture, an 8 K FFT ASIC is designed for use in the DVB (Digital Video Broadcasting) application in 0.6 /spl mu/m-3.3 V triple-metal CMOS process.

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一种新的面向vlsi的FFT算法及其实现

本文提出了一种新的面向vlsi的快速傅里叶变换(FFT)算法——radix-2/4/8，该算法可以有效地减少复乘法的次数。该算法可以使用流水线架构高效地实现。基于这种流水线架构，设计了一种用于数字视频广播(DVB)应用的8k FFT ASIC，采用0.6 /spl mu/m-3.3 V三金属CMOS工艺。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)

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