Towards a better EOT - mobility trade-off in high-k oxide/metal gate CMOS devices

M. Muller, S. Duguay, B. Guillaumot, X. Garros, C. Leroux, B. Tavel, F. Martin, M. Rivoire, D. Delille, F. Boeuf, S. Deleonibus, T. Skotnicki
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引用次数: 6

Abstract

In this paper, we present electrical results on damascene CMOS devices containing a HfO/sub 2/ gate oxide and a TiN/W gate electrode and give a detailed analysis of the performance data and the carrier mobility in both pMOS and nMOS devices. We report on an improvement of the electron mobility compared to recent literature data, which seems to be related to a slightly higher interfacial oxide layer. These findings are very interesting regarding the definition of a good trade-off between mobility and EOT for future CMOS transistors using high-k materials for the gate oxide.
在高钾氧化物/金属栅CMOS器件中实现更好的EOT迁移率权衡
在本文中,我们介绍了含有HfO/sub / 2/栅极氧化物和TiN/W栅极电极的damascene CMOS器件的电学结果,并详细分析了pMOS和nMOS器件的性能数据和载流子迁移率。与最近的文献数据相比,我们报告了电子迁移率的改善,这似乎与稍高的界面氧化层有关。这些发现对于使用高k材料作为栅极氧化物的未来CMOS晶体管的迁移率和EOT之间的良好权衡的定义非常有趣。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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