{"title":"A 12-nm 0.62-1.61 mW Ultra-Low Power Digital CIM-based Deep-Learning System for End-to-End Always-on Vision","authors":"En-Jui Chang, Cheng-Xin Xue, Chetan Deshpande, Gajanan Jedhe, Jenwei Liang, Chih-Chung Cheng, Hung-Wei Lin, Chia-Da Lee, Sushil Kumar, Kim Soon Jway, Zijie Guo, Ritesh Garg, Allen-CL Lu, Chien-Hung Lin, Meng-Han Hsieh, Tsung-Yao Lin, Chih-Cheng Chen","doi":"10.23919/VLSITechnologyandCir57934.2023.10185296","DOIUrl":null,"url":null,"abstract":"This work proposes an ultra-low power DCIM-based DL system (DCIM-DLS) for end-to-end AoV with the power range from 0.62 to 1.61 mW (INT8, 2-15 fps). Compared to the prior art [3], the power consumption of DCIM-DLS can be reduced by 70.9% based on the following techniques: 1) an area and energy efficient DCIM that reduces compute RC loading by using pushed-rule 2p8T SRAM bitcell with folded kernels selector, 2) a DCIM-friendly dataflow strategy with dual accumulators that minimizes the DCIM power of weight update and avoids redundant data movement for power saving, and 3) a reconfigurable DCIM control scheme that supports mixed-precision to further reduce power consumption.","PeriodicalId":317958,"journal":{"name":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":"85 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185296","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This work proposes an ultra-low power DCIM-based DL system (DCIM-DLS) for end-to-end AoV with the power range from 0.62 to 1.61 mW (INT8, 2-15 fps). Compared to the prior art [3], the power consumption of DCIM-DLS can be reduced by 70.9% based on the following techniques: 1) an area and energy efficient DCIM that reduces compute RC loading by using pushed-rule 2p8T SRAM bitcell with folded kernels selector, 2) a DCIM-friendly dataflow strategy with dual accumulators that minimizes the DCIM power of weight update and avoids redundant data movement for power saving, and 3) a reconfigurable DCIM control scheme that supports mixed-precision to further reduce power consumption.