{"title":"Dynamic checking improves MEMS design methodology","authors":"Xavier Marin, J. Carrabina, J. Bausells","doi":"10.1117/12.382310","DOIUrl":null,"url":null,"abstract":"Design verification methodologies and tool such as DRC and ERC used on MEMS design have been inherited from the transistor based analog and digital full custom design flows. However the devices are defined on a 2D layout, they have a 3D structure. Thus, current tools do not have into account the new features that appear in MEMS design, especially those related with device micro machining. The main consequence on it is that it is necessary to include information of the vertical parameters on the DRC, what is not at all usual in classical design. We claim that the inclusion of such information together with the consequent improvement of tools for DRC, ERC and device parameter extraction, can reduce design and simulation efforts as well as improve the manufacturing yield.","PeriodicalId":318748,"journal":{"name":"Design, Test, Integration, and Packaging of MEMS/MOEMS","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Design, Test, Integration, and Packaging of MEMS/MOEMS","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1117/12.382310","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Design verification methodologies and tool such as DRC and ERC used on MEMS design have been inherited from the transistor based analog and digital full custom design flows. However the devices are defined on a 2D layout, they have a 3D structure. Thus, current tools do not have into account the new features that appear in MEMS design, especially those related with device micro machining. The main consequence on it is that it is necessary to include information of the vertical parameters on the DRC, what is not at all usual in classical design. We claim that the inclusion of such information together with the consequent improvement of tools for DRC, ERC and device parameter extraction, can reduce design and simulation efforts as well as improve the manufacturing yield.