M. Tanaka, S. Saida, F. Inoue, M. Kojima, T. Nakanishi, K. Suguro, Y. Tsunashima
{"title":"Realization of high performance dual gate DRAMs without boron penetration by application of tetrachlorosilane silicon nitride films","authors":"M. Tanaka, S. Saida, F. Inoue, M. Kojima, T. Nakanishi, K. Suguro, Y. Tsunashima","doi":"10.1109/VLSIT.2001.934980","DOIUrl":null,"url":null,"abstract":"It is well known that conventional SiN films accelerate boron penetration due to hydrogen desorption during a high temperature annealing process after SiN deposition (Pfiester et al, 1990). The boron penetration causes depletion of the gate electrodes and threshold voltage deviations, and degrades the PMOSFETs. In the case of next generation DRAMs, thick SiN films are necessary as a hard mask for a self-aligned contact (SAC) process to increase the density. Simultaneously, dual gate CMOS systems should be applied to realize high performance. Therefore, SiN films without boron penetration must be developed for realization of dual gate CMOS systems with a SAC process. Conventional silicon nitride (SiN) films accelerate boron penetration, which causes the degradation of PMOSFETs. It was found that boron penetration becomes worse in proportion to SiH content incorporated in SiN LPCVD films. Applications of SiH-less SiN films, formed from tetrachlorosilane (TCS) and ammonia, have successfully realized the high performance of PMOSFETs in dual gate system DRAMs.","PeriodicalId":232773,"journal":{"name":"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2001.934980","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
It is well known that conventional SiN films accelerate boron penetration due to hydrogen desorption during a high temperature annealing process after SiN deposition (Pfiester et al, 1990). The boron penetration causes depletion of the gate electrodes and threshold voltage deviations, and degrades the PMOSFETs. In the case of next generation DRAMs, thick SiN films are necessary as a hard mask for a self-aligned contact (SAC) process to increase the density. Simultaneously, dual gate CMOS systems should be applied to realize high performance. Therefore, SiN films without boron penetration must be developed for realization of dual gate CMOS systems with a SAC process. Conventional silicon nitride (SiN) films accelerate boron penetration, which causes the degradation of PMOSFETs. It was found that boron penetration becomes worse in proportion to SiH content incorporated in SiN LPCVD films. Applications of SiH-less SiN films, formed from tetrachlorosilane (TCS) and ammonia, have successfully realized the high performance of PMOSFETs in dual gate system DRAMs.
众所周知,传统的SiN薄膜在沉积后的高温退火过程中,由于氢的解吸,会加速硼的渗透(Pfiester et al, 1990)。硼的渗透导致栅极损耗和阈值电压偏差,降低了pmosfet的性能。在下一代dram的情况下,厚SiN薄膜作为自对准接触(SAC)工艺的硬掩膜是必要的,以增加密度。同时,为了实现高性能,需要采用双栅CMOS系统。因此,采用SAC工艺实现双栅CMOS系统必须开发无硼渗透的SiN薄膜。传统的氮化硅(SiN)薄膜加速硼的渗透,导致pmosfet的退化。结果表明,随着SiH含量的增加,硼的穿透性越差。由四氯硅烷(TCS)和氨形成的SiH-less SiN薄膜在双栅系统dram中成功实现了pmosfet的高性能。