Novel dual gate high voltage TFT with variable doping slot

Abstract

A novel high performance dual gated, glass compatible polycrystalline silicon HVTFT with blocking voltage in excess of 300 V is demonstrated. This device shows an order of magnitude improvement in the on-state performance in comparison to its offset drain (DG-OD) counterpart. The significantly enhanced performance of this dual gate device is due to an offset region doped through slots of reducing dimensions from the source (control gate) to the drain (sub-gate).