Exploring Power Savings of Gate-All-Around Cryogenic Technology

Abstract

Operating CMOS circuits at cryogenic temperatures is becoming the most promising way to reduce power consumption of server farms [1–5]. This becomes possible by drastically reducing power supply voltage Vdd due to the steep subthreshold slope at low temperatures, avoiding 60 mV per decade “Boltzmann curse”. A key factor for reducing Vdd is a tight variability, which is enabled by the GAA (Gate-All-Around) technology [6–8]. In this work, we explore possible reduction of power consumption by operating GAA logic circuits at cryogenic temperatures. Besides, we estimate the combined power consumption of logic at cryogenic temperatures and the power required for cooling it.