A 300 nW, 12 ppm//spl deg/C Voltage Reference in a Digital 0.35 /spl mu/m CMOS Process

Abstract

A voltage reference has been implemented in a standard 0.35 mum CMOS process. A temperature coefficient of 12 ppm/degC is achieved in virtue of a complete suppression of the temperature dependence of the carrier mobility. The line sensitivity is 0.46 %/V and the maximum supply current, measured at 80degC, is 130 nA. The PSSR at 100 Hz and 10 MHz is -59 dB and -52 dB, respectively