Energy-Efficient Design of RAM and Its Implementation on FPGA

B. Pandey, Amrit Ratnakar, D. Joshi, A. Gupta
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引用次数: 1

Abstract

There are many systems which use RAM as its primary memory for example spacecraft, our home computer etc. Energy efficient RAM is even more important in outer space exploration as the power source is very limited and the environmental condition is extreme. Energy efficiency is not only based on the architecture of the system but also on the environmental condition. For that reason, low power RAM will increase the performance of the system even in extreme conditions. In this project, we are advancing towards a design of RAM that will consume less power even in extreme conditions. Four contemporary FPGAs are used for implementation of our RAM design and we find the least power consumer among these four FPGAs architectures. We find a 20.24% reduction in power consumption at 5pF, when we migrate our RAM design from Kintex-7 architecture to Artix-7 Architecture. The results are gathered by using Xilinx Vivado 19.1 tool with VERILOG hardware description language.
RAM节能设计及其在FPGA上的实现
有许多系统使用RAM作为主存储器,例如航天器,我们的家用电脑等。在外太空探索中,由于动力源有限,环境条件恶劣,高效节能的RAM显得尤为重要。能源效率不仅取决于系统的结构,还取决于环境条件。因此,即使在极端条件下,低功耗RAM也将提高系统的性能。在这个项目中,我们正在推进RAM的设计,即使在极端条件下也会消耗更少的功率。四个当代fpga用于实现我们的RAM设计,我们在这四个fpga架构中找到了功耗最小的fpga。当我们将RAM设计从Kintex-7架构迁移到Artix-7架构时,我们发现5pF时功耗降低了20.24%。采用Xilinx Vivado 19.1工具和VERILOG硬件描述语言进行数据采集。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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