A Configurable Hysteresis Comparator for Asynchronous Sigma-Delta Modulators

Abstract

This paper describes a configurable hysteresis comparator for asynchronous sigma-delta modulators (ASDM). The proposed comparator provides coarse and fine tuning options for configuring the loop delay and hence the frequency of an ASDM. The post-layout simulation of the comparator implemented in a 28 nm FDSOI process shows that the comparator provides hysteresis voltage range of ±(1 to 15.3) mV while consuming 36.8 nW to 4.4 μW from 0.7 V supply, which enables configurable ASDM center-frequency in the range of 100 kHz to 6 MHz.