Parallel MPEG-2 Video Encoder

R. Sachdeva, K. Saha
{"title":"Parallel MPEG-2 Video Encoder","authors":"R. Sachdeva, K. Saha","doi":"10.1109/ICCE.2011.5722515","DOIUrl":null,"url":null,"abstract":"In this paper we present a unique approach towards parallelizing the Software MPEG-2 Video Encoder. The approach involves the division of encoding process spatially, between four similar processors with distributed memory system, in such a way that each frame of the input video sequence is divided into four separate sections, each individually processed by a processor. The results thus produced were compared with those of the Sequential Encoder for a number of different input bitstreams and a speedup in the range of 3 to 3.5 with four processors was successfully obtained.","PeriodicalId":256368,"journal":{"name":"2011 IEEE International Conference on Consumer Electronics (ICCE)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Conference on Consumer Electronics (ICCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCE.2011.5722515","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

In this paper we present a unique approach towards parallelizing the Software MPEG-2 Video Encoder. The approach involves the division of encoding process spatially, between four similar processors with distributed memory system, in such a way that each frame of the input video sequence is divided into four separate sections, each individually processed by a processor. The results thus produced were compared with those of the Sequential Encoder for a number of different input bitstreams and a speedup in the range of 3 to 3.5 with four processors was successfully obtained.
并行MPEG-2视频编码器
本文提出了一种实现软件MPEG-2视频编码器并行化的独特方法。该方法涉及编码过程的空间划分,在四个具有分布式存储系统的类似处理器之间,以这样一种方式,输入视频序列的每一帧被划分为四个独立的部分,每个部分由处理器单独处理。将所产生的结果与顺序编码器的结果进行了比较,结果表明,在四个处理器的情况下,加速范围在3到3.5之间。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信