Erasing logic-memory boundaries in superconductor electronics

Abstract

Superconductor electronics holds records for clock frequency and energy efficiency at the chip level, and is also projected to large systems that can absorb the cooling overhead. These advantages have nevertheless only managed to give this technology a back seat to CMOS digital circuits, which offer orders of magnitude more complexity. Furthermore, pursuing the CMOS paradigm with superconductor circuits would bring their clock frequency down to that of CMOS circuits. This makes superconductor technology much more open to risky innovations and even for paradigm changes. In the paper we point out that both (speed and energy efficiency) advantages of superconductor electronics could be preserved due to a unique composition of memory and logic functions of RSFQ cells. We propose to reorganize the original RSFQ cells into a new family of Memory And loGIC (MAGIC) gate/register objects that run arithmetic calculations as well as store results. The new MAGIC objects eliminate the time and energy overheads associated with the conventional transfer of computed data to memory by essentially reducing the transfer distance to zero. The new objects could serve as building blocks for distributed MAGIC-compatible architectures, differing from CMOS-like register files by processing as well as storing data. A simple Logic Unit (LU) would be sufficient to control the MAGIC registers, because the registers would provide most of the arithmetic functions and separate ALUs would not be needed. The reduction of the data exchange between logic and memory units leads to additional energy saving. Factorization of large integers is presented as an example illustrating the speed and density advantages of the new approach. The end result will be a superior technology which offers a combination of performance and energy efficiency unattainable by existing technologies or their possible extensions.