A low-noise 2-GB/s 256-Mb packet-based DRAM with a robust array power supply

K. Kwon, B. Moon, Changhyun Kim, Sooin Cho
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Abstract

With a robust array power supply, the array noise is remarkably suppressed in 256-Mb packet-based DRAM. The array power supply is equipped with direct driver discharge, Vgs clamp, high-VCC compensator, and low-VCC Vgs booster. The VCCA drop and overshoot are improved from 133 mV to 70 mV and from 260 mV to 120 mV, respectively, as all these features are included. The tranquil VCCA results in active restoration improvement by 3.0 ns in the full chip performance. The suppression of the VCCA overshoot makes high speed operation reliable owing to rapid column precharge. The power consumption by the VCCA generator is also reduced by 35% because of the time-variant DC current control.
低噪声2gb /s 256 mb基于分组的DRAM,具有强大的阵列电源
在基于256 mb分组的DRAM中,具有强大的阵列电源,可以显著抑制阵列噪声。阵列电源配有直接驱动放电、Vgs钳、高vcc补偿器和低vcc Vgs升压器。VCCA下降和超调分别从133 mV提高到70 mV和从260 mV提高到120 mV,因为所有这些特征都包括在内。宁静的VCCA使全芯片性能的主动恢复提高了3.0 ns。由于快速的柱前充注,抑制VCCA超调使高速运行可靠。由于时变直流电流控制,VCCA发电机的功耗也降低了35%。
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