Composite combinatorial scheme of test planning (example for microprocessor systems)

Abstract

This paper focuses on designing an efficient test strategy (plan) for a set of microprocessor systems. The problem is examined as a composite one. A four-stage solving scheme is suggested. The following underlying models are used: (i) multicriteria ranking, (ii) knapsack-like problems (e.g., multicriteria multiple choice problem), (iii) clustering, and (iv) multicriteria assignment/allocation.