Asic Cad Applications And Algorithms

Abstract

Computer-aided design is central to ASIC design, supporting the design process from specification to implementation. The papers presented in this year’s CAD session reflect the broad importance of CAD in the ASIC design process, with papers addressing both the application of ASIC EDA tools, complete tool suites, and the algorithms they use. The session opens with a case study by Alcatel and Toshiba on CAD design methods for million gate systems. The session then addresses the application of CAD tools for the design of a Fast Discrete Cosine Transform and an embedded DRAM compiler for systems on a chip. Automatic layout synthesis and power estimation are covered in the next two papers. The first describes automatic layout of dynamic CMOS circuits and the second describes architectural estimation of power dissipation in processor control units. Finally the session closes with the presentation of papers on CAD algorithms, including a paper on incremental rerouting of mapped FPGA circuits and two papers on VLSI circuit partitioning. The first applies TABU intelligent problem solving to bipafl itioning, while the second reports on improved wirelengths by relaxing the traditional bisection constraint.