{"title":"Automatic recovery of memory operability in microprocessor based control system","authors":"S. V. Volobuev, V. Ryabtsev, T. Utkina","doi":"10.1109/ICIEAM.2016.7911538","DOIUrl":null,"url":null,"abstract":"The problem of increasing the coefficient of technical readiness of memory module, the value of which increases with decreasing of control system recovery time in case of failure of its constituent units, is solved. The proposed structure of the memory module with built-in self-test and restore functionality that will allow auto-replacing bits of data of the main memory cell array, in which there have been failures in the data output from the spare memory cell array. Automatic reconfiguration of the memory module when a fault is detected provides the proposed hardware and software.","PeriodicalId":130940,"journal":{"name":"2016 2nd International Conference on Industrial Engineering, Applications and Manufacturing (ICIEAM)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 2nd International Conference on Industrial Engineering, Applications and Manufacturing (ICIEAM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIEAM.2016.7911538","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The problem of increasing the coefficient of technical readiness of memory module, the value of which increases with decreasing of control system recovery time in case of failure of its constituent units, is solved. The proposed structure of the memory module with built-in self-test and restore functionality that will allow auto-replacing bits of data of the main memory cell array, in which there have been failures in the data output from the spare memory cell array. Automatic reconfiguration of the memory module when a fault is detected provides the proposed hardware and software.