{"title":"ReverseAge: An online NBTI combating technique using time borrowing","authors":"Seyab Khan, S. Hamdioui","doi":"10.1109/IDT.2011.6123098","DOIUrl":null,"url":null,"abstract":"As semiconductor manufacturing has entered into the nanoscale era, Negative Bias Temperature Instability (NBTI) has become one of the most significant aging mechanisms leading to reliability issues. This paper presents ReverseAge, a technique that detects delay due to NBTI and utilizes design timing margins to ensure reliable circuit operation. First, it presents a scheme to detect the NBTI induced delay. Second, it presents a technique to tolerate the errors; the technique exploits the available design timing margins to compensate for the NBTI induced delay. The evaluation of ReverseAge has been performed by integrating it in an ISCAS-89 benchmark circuit. The simulation results show 3× reliability improvements with respect to state-of-the-art. The improvement comes at the cost of 3.77% area and 1.4% power overheads.","PeriodicalId":167786,"journal":{"name":"2011 IEEE 6th International Design and Test Workshop (IDT)","volume":"121 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE 6th International Design and Test Workshop (IDT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IDT.2011.6123098","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
As semiconductor manufacturing has entered into the nanoscale era, Negative Bias Temperature Instability (NBTI) has become one of the most significant aging mechanisms leading to reliability issues. This paper presents ReverseAge, a technique that detects delay due to NBTI and utilizes design timing margins to ensure reliable circuit operation. First, it presents a scheme to detect the NBTI induced delay. Second, it presents a technique to tolerate the errors; the technique exploits the available design timing margins to compensate for the NBTI induced delay. The evaluation of ReverseAge has been performed by integrating it in an ISCAS-89 benchmark circuit. The simulation results show 3× reliability improvements with respect to state-of-the-art. The improvement comes at the cost of 3.77% area and 1.4% power overheads.