Modular system-level architecture for concurrent cell balancing

M. Kauer, Swaminathan Naranayaswami, S. Steinhorst, M. Lukasiewycz, S. Chakraborty, L. Hedrich
{"title":"Modular system-level architecture for concurrent cell balancing","authors":"M. Kauer, Swaminathan Naranayaswami, S. Steinhorst, M. Lukasiewycz, S. Chakraborty, L. Hedrich","doi":"10.1145/2463209.2488926","DOIUrl":null,"url":null,"abstract":"This paper proposes a novel modular architecture for Electrical Energy Storages (EESs), consisting of multiple series-connected cells. In contrast to state-of-the-art architectures, the presented approach significantly improves the energy utilization, safety, and availability of EESs. For this purpose, each cell is equipped with a circuit that enables an individual control within a homogeneous architecture. One major advantage of our approach is a direct and concurrent charge transfer between each cell of the EES using inductors. To enable a system-level modeling and performance analysis of the architecture, a detailed investigation of the components and their interaction with the Pulse Width Modulation (PWM) control was performed at transistor-level. At system-level, we propose a control algorithm for the charge transfer that aims at minimizing the energy loss and balancing time. The results give evidence of the significant advantages of our architecture over existing passive and active balancing methods in terms of energy efficiency and charge equalization time.","PeriodicalId":320207,"journal":{"name":"2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2463209.2488926","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 24

Abstract

This paper proposes a novel modular architecture for Electrical Energy Storages (EESs), consisting of multiple series-connected cells. In contrast to state-of-the-art architectures, the presented approach significantly improves the energy utilization, safety, and availability of EESs. For this purpose, each cell is equipped with a circuit that enables an individual control within a homogeneous architecture. One major advantage of our approach is a direct and concurrent charge transfer between each cell of the EES using inductors. To enable a system-level modeling and performance analysis of the architecture, a detailed investigation of the components and their interaction with the Pulse Width Modulation (PWM) control was performed at transistor-level. At system-level, we propose a control algorithm for the charge transfer that aims at minimizing the energy loss and balancing time. The results give evidence of the significant advantages of our architecture over existing passive and active balancing methods in terms of energy efficiency and charge equalization time.
用于并行单元平衡的模块化系统级架构
本文提出了一种由多个串联单元组成的新型电能存储模块结构。与最先进的体系结构相比,本文提出的方法显著提高了EESs的能源利用率、安全性和可用性。为此,每个单元都配备了一个电路,可以在同构结构中实现单独的控制。我们的方法的一个主要优点是使用电感器在EES的每个电池之间直接和并发的电荷转移。为了实现系统级的架构建模和性能分析,在晶体管级对组件及其与脉宽调制(PWM)控制的交互进行了详细的研究。在系统层面,我们提出了一种以能量损失和平衡时间最小化为目标的电荷转移控制算法。结果证明了我们的架构在能源效率和电荷均衡时间方面比现有的被动和主动平衡方法具有显着优势。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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