{"title":"FEMU: A firmware-based emulation framework for SoC verification","authors":"Hao Li, Dong Tong, Kan Huang, Xu Cheng","doi":"10.1145/1878961.1879007","DOIUrl":null,"url":null,"abstract":"Full-system emulation on FPGA(Field-Programmable Gate Array) with real-world workloads can enhance the confidence of SoC(System-on-Chip) design. However, since FPGA emulation requires complete implementation of key modules and provides weak visibility, it is time-consuming. This paper proposes FEMU, a hybrid firmware/hardware emulation framework for SoC verification. The core of FEMU is implemented by transplanting QEMU, a full-system emulator, from OS level to BIOS level, so we can directly emulate devices upon hardware. Moreover, FEMU provides programming interfaces to simplify device modeling in firmware. Based on an auxiliary set of hardware modules, FEMU allows hybrid full-system emulation with the combination of real hardware and emulated firmware model. Therefore, FEMU can facilitate full-system emulation in three aspects. First, FEMU enables full-system emulation with the minimum hardware implementation, so the DUT (Design Under Test) module can be verified under target application as early as possible. Second, by comparing the execution traces generated using real hardware and emulated firmware model, respectively, FEMU helps locate and fix bugs occurred in the full-system emulation. Third, by replacing un-verified hardware modules with emulated firmware models, FEMU helps isolating design issues in multiple modules. In a practical SoC project, FEMU helped us identify several design issues in full-system emulation. In addition, the evaluation results show that the emulation speed of FEMU is comparable with QEMU after transplantation.","PeriodicalId":118816,"journal":{"name":"2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1878961.1879007","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
Full-system emulation on FPGA(Field-Programmable Gate Array) with real-world workloads can enhance the confidence of SoC(System-on-Chip) design. However, since FPGA emulation requires complete implementation of key modules and provides weak visibility, it is time-consuming. This paper proposes FEMU, a hybrid firmware/hardware emulation framework for SoC verification. The core of FEMU is implemented by transplanting QEMU, a full-system emulator, from OS level to BIOS level, so we can directly emulate devices upon hardware. Moreover, FEMU provides programming interfaces to simplify device modeling in firmware. Based on an auxiliary set of hardware modules, FEMU allows hybrid full-system emulation with the combination of real hardware and emulated firmware model. Therefore, FEMU can facilitate full-system emulation in three aspects. First, FEMU enables full-system emulation with the minimum hardware implementation, so the DUT (Design Under Test) module can be verified under target application as early as possible. Second, by comparing the execution traces generated using real hardware and emulated firmware model, respectively, FEMU helps locate and fix bugs occurred in the full-system emulation. Third, by replacing un-verified hardware modules with emulated firmware models, FEMU helps isolating design issues in multiple modules. In a practical SoC project, FEMU helped us identify several design issues in full-system emulation. In addition, the evaluation results show that the emulation speed of FEMU is comparable with QEMU after transplantation.
在FPGA(现场可编程门阵列)上进行具有实际工作负载的全系统仿真可以增强SoC(片上系统)设计的信心。然而,由于FPGA仿真需要完整实现关键模块,并且提供较弱的可见性,因此非常耗时。本文提出了FEMU,一个用于SoC验证的混合固件/硬件仿真框架。FEMU的核心是通过将全系统仿真器QEMU从OS级移植到BIOS级来实现的,因此可以直接在硬件上对设备进行仿真。此外,FEMU还提供编程接口,以简化固件中的设备建模。FEMU基于一组辅助硬件模块,实现了真实硬件和仿真固件模型相结合的混合全系统仿真。因此,FEMU可以从三个方面实现全系统仿真。首先,FEMU可以用最少的硬件实现实现全系统仿真,因此DUT (Design Under Test)模块可以尽早在目标应用下进行验证。其次,通过比较真实硬件和仿真固件模型生成的执行轨迹,FEMU可以帮助定位和修复全系统仿真中出现的错误。第三,通过用仿真固件模型取代未经验证的硬件模块,FEMU有助于隔离多个模块中的设计问题。在一个实际的SoC项目中,FEMU帮助我们确定了全系统仿真中的几个设计问题。此外,评估结果表明,FEMU移植后的仿真速度与QEMU相当。