{"title":"The design of an integrated guidance and control computer system based on multi-core DSP and FPGA","authors":"Depeng Kong, Qingzhong Jia, Hong Xu","doi":"10.1109/CISP.2015.7408145","DOIUrl":null,"url":null,"abstract":"A design approach of an integrated guidance and control of missile-borne embedded computer system is proposed in this paper, which utilizes a multi-core DSP as the central data processing unit and a FPGA as the co-processing unit. The approach takes advantages of the multi-core processor's resources, which provides a powerful hardware platform base for data processing, data transmission and complex algorithm implementation in high speed and capacity. Aiming at real-time parallel processing, this paper splits and maps the processing tasks of system to each processor core evenly in the master-slave mode.","PeriodicalId":167631,"journal":{"name":"2015 8th International Congress on Image and Signal Processing (CISP)","volume":"98 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 8th International Congress on Image and Signal Processing (CISP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CISP.2015.7408145","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A design approach of an integrated guidance and control of missile-borne embedded computer system is proposed in this paper, which utilizes a multi-core DSP as the central data processing unit and a FPGA as the co-processing unit. The approach takes advantages of the multi-core processor's resources, which provides a powerful hardware platform base for data processing, data transmission and complex algorithm implementation in high speed and capacity. Aiming at real-time parallel processing, this paper splits and maps the processing tasks of system to each processor core evenly in the master-slave mode.